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HA-2529/883
July 1997
Uncompensated, High Slew Rate High Output Current, Operational Amplifier
Description
The HA-2529/883 is a monolithic operational amplifier which typifies excellence of design. With a design based on years of experience coupled with the reliable dielectric isolation process, these amplifiers provide an outstanding combination of DC and AC parameters at closed loop gains of 3 or greater without external compensation. The HA-2529/883 offers 135V/s (min) slew rate and fast settling time (200ns typ), while consuming a mere 6mA (max) quiescent supply current, making these amplifiers ideal components for video circuitry and data acquisition designs. With 15MHz minimum gain-bandwidth product combined with 7.5kV/V minimum open loop gain, the HA-2529/883 is an ideal component for demanding signal conditioning designs. These devices provide 30mA (min) output current drive with an output voltage swing of 10V (min), making then suited for pulse amplifier and RF amplifier components. HA-2529/883 will upgrade a system presently using the HA-2520/22/883 or EHA-2520/22/883 in regards to output current, slew rate, offset voltage drift, and offset current drift. To insure compliance with slew rate and transient response specifications, all devices are 100% tested for AC performance characteristics over full temperature.
Features
* This Circuit is Processed in Accordance to MIL-STD-883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. * High Slew Rate . . . . . . . . . . . . . . . . . . . . . 135V/s (Min) 150V/s (Typ) * High Output Current . . . . . . . . . . . . . . . . . 30mA (Min) * High Gain-Bandwidth Product . . . . . . . . . 15MHz (Min) 20MHz(Typ) * Wide Power Bandwidth . . . . . . . . . . . . . . . 2.1MHz (Min) * High Input Impedance . . . . . . . . . . . . . . . . . 50M (Min) 130M (Typ) * Low Offset Current . . . . . . . . . . . . . . . . . . . 25nA (Max) 5nA (Typ) * Fast Settling (10V Step to 0.1%) . . . . . . . . . . . 200ns (Typ) * Low Quiescent Supply Current . . . . . . . . . . 6mA (Max)
Applications
* Data Acquisition Systems * RF Amplifiers * Video Amplifiers * Signal Generators * Pulse Amplification
Ordering Information
PART NUMBER HA2-2529/883 HA7-2529/883 TEMP. RANGE (oC) -55 to 125 -55 to 125 PACKAGE 8 Pin Metal Can 8 Ld CERDIP PKG. NO. T8.C F8.3A
Pinouts
HA-2529/883 (CERDIP) TOP VIEW HA-2529/883 (METAL CAN) TOP VIEW
COMP BAL -IN +IN V1 2 3 4 + 8 7 6 5 COMP V+ OUT BAL +IN 3 4 V5 BAL -IN BAL 1 + 8 7 V+
2
6 OUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
Spec Number
1
511025-883 File Number 3736.1
HA-2529/883
Absolute Maximum Ratings
TA = 25oC
Thermal Information
Thermal Resistance (Typical, Note 1) JA JC CERDIP Package . . . . . . . . . . . . . . . . 115oC/W 28oC/W Metal Can Package . . . . . . . . . . . . . . . 160oC/W 75oC/W Package Power Dissipation Limit at 75oC for TJ 175oC CERDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 870mW Metal Can Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 625mW Package Power Dissipation Derating Factor Above 75oC CERDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.7mW/oC Metal Can Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.3mW/oC Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 175oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . . 40V Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V Voltage at Either Input Terminal . . . . . . . . . . . . . . . . . . . . . . V+ to VPeak Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <2000V
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V VINCM 1/2 (V+ - V-) RL 500
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air. TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested at: VSUPPLY = 15V, RSOURCE = 100, RLOAD = 500k, VOUT = 0V, Unless Otherwise Specified. PARAMETER Input Offset Voltage SYMBOL VIO CONDITIONS VCM = 0V GROUP A SUBGROUPS 1 2, 3 Input Bias Current +IB VCM = 0V, +RS = 100k, -RS = 100 VCM = 0V, +RS = 100, -RS = 100k VCM = 0V, +RS = 100k, -RS = 100k V+ = 5V, V- = -25V 1 2, 3 1 2, 3 1 2, 3 1 2, 3 -CMR V+ = 25V, V- = -5V 1 2, 3 Large Signal Voltage Gain +AVOL VOUT = 0V and +10V, RL = 2k 4 5, 6 -AVOL VOUT = 0V and -10V, RL = 2k 4 5, 6 Common Mode Rejection Ratio +CMRR VCM = +10V, V+ = +5V, V- = -25V, VOUT = -10V VCM = -10V, V+ = +25V, V- = -5V, VOUT = +10V RL = 2k 1 2, 3 1 2, 3 4 5, 6 -VOUT RL = 2k 4 5, 6 TEMP. (oC) 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 MIN -5 -8 -200 -400 -200 -400 -25 -50 +10 +10 10 7.5 10 7.5 83 80 83 80 10 10 MAX 5 8 200 400 200 400 25 50 -10 -10 -10 -10 UNITS mV mV nA nA nA nA nA nA V V V V kV/V kV/V kV/V kV/V dB dB dB dB V V V V
-IB
Input Offset Current Common Mode Range
IIO
+CMR
-CMRR
Output Voltage Swing
+VOUT
Spec Number 2
511025-883
HA-2529/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested at: VSUPPLY = 15V, RSOURCE = 100, RLOAD = 500k, VOUT = 0V, Unless Otherwise Specified. PARAMETER Output Current SYMBOL +IOUT CONDITIONS VOUT = -10V GROUP A SUBGROUPS 4 5, 6 -IOUT VOUT = +10V 4 5, 6 Quiescent Power Supply Current +ICC VOUT = 0V, IOUT = 0mA 1 2, 3 -ICC VOUT = 0V, IOUT = 0mA 1 2, 3 Power Supply Rejection Ratio +PSRR VSUP = 10V, V+ = +20V, V- = -15V, V+ = +10V, V- = -15V VSUP = 10V, V+ = +15V, V- = -20V, V+ = +15V, V- = -10V Note 2 1 2, 3 -PSRR 1 2, 3 Offset Voltage Adjustment +VIOAdj 1 2, 3 -VIOAdj Note 2 1 2, 3 NOTE: 2. Offset adjustment range is [VIO (Measured) 1mV] minimum referred to output. This test is for functionality only to assure adjustment through 0V. TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested at: VSUPPLY = 15V, RSOURCE = 50, RLOAD = 2k, CLOAD = 50pF, AVCL = +3V/V, Unless Otherwise Specified. PARAMETERS Slew Rate SYMBOL +SR CONDITIONS VOUT = -5V to +5V 25% +SR 75% VOUT = +5V to -5V 75% -SR 25% VOUT = 0 to +200mV 10% tr 90% VOUT = 0 to -200mV 10% tf 90% VOUT = 0 to +200mV GROUP A SUBGROUPS 7 8A, 8B -SR 7 8A, 8B Rise and Fall Time tr 7 8A, 8B 7 8A, 8B 7 8A, 8B -OS VOUT = 0 to -200mV 7 8A, 8B TEMP. (oC) 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 MIN 135 125 135 125 MAX 45 50 45 50 40 40 40 40 UNITS V/s V/s V/s V/s ns ns ns ns % % % % TEMP. (oC) 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 25 125, -55 MIN 30 20 -6 -7 80 80 80 80 VIO-1 VIO-1 VIO+1 VIO+1 MAX -30 -20 6 7 UNITS mA mA mA mA mA mA mA mA dB dB dB dB mV mV mV mV
tf
Overshoot
+OS
Spec Number 3
511025-883
HA-2529/883
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS Device Characterized at: VSUPPLY = 15V, RLOAD = 2k, CLOAD = 50pF, CCOMP = 0pF, Unless Otherwise Specified. PARAMETERS Differential Input Resistance Gain Power Bandwidth Full Power Bandwidth Minimum Closed Loop Stable Gain Output Resistance Power Consumption NOTES: 3. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon data from multiple production runs which reflect lot to lot and within lot variation. 4. Full Power Bandwidth guarantee based on Slew Rate measurement using FPBW = Slew Rate/(2VPEAK). 5. Quiescent Power Consumption based upon Quiescent Supply Current test maximum. (No load on outputs.) TABLE 4. ELECTRICAL TEST REQUIREMENTS MIL-STD-883 TEST REQUIREMENTS Interim Electrical Parameters (Pre Burn-In) Final Electrical Test Parameters Group A Test Requirements Groups C and D Endpoints NOTE: 6. PDA applies to Subgroup 1 only. SUBGROUPS (SEE TABLES 1 AND 2) 1 1 (Note 6), 2, 3, 4, 5, 6, 7, 8A, 8B 1, 2, 3, 4, 5, 6, 7, 8A, 8B 1 SYMBOL RIN GBWP FPBW CLSG CONDITIONS VCM = 0V VO = 200mV, fO 10kHz VPEAK = 10V RL = 2k, CL = 50pF NOTES 3 3 3, 4 3 TEMP. (oC) 25 25 25 -55 to 125 MIN 50 15 2.1 3 MAX UNITS M MHz MHz V/V
ROUT PC
Open Loop VOUT = 0V, IOUT = 0mA
3 3, 5
25 -55 to 125
-
60 210
mW
Spec Number 4
511025-883
HA-2529/883 Die Characteristics
DIE DIMENSIONS: 67 mils x 57 mils x 19 mils 1700m x 1440m x 483m METALLIZATION: Type: Al, 1% Cu Thickness: 16kA 2kA GLASSIVATION: Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.) Silox Thickness: 12kA 2kA Nitride Thickness: 3.5kA 1.5kA WORST CASE CURRENT DENSITY: 0.78 x 105 A/cm2 SUBSTRATE POTENTIAL (Powered Up): Unbiased TRANSISTOR COUNT: 40 PROCESS: Bipolar Dielectric Isolation
Metallization Mask Layout
HA-2529/883
COMP
V+
OUT
BAL
BAL
-IN
+IN
V-
Spec Number 5
511025-883
HA-2529/883 Test Circuit
(Applies to Tables 1 and 2)
667
1.33K ACOUT V+ 0.1 1 S7 3 2 1 1 1 OPEN 1 2 2 DUT + S5B 1 S8 2 3 50K 50pF (NOTE) -1/10 V1
100K 2 S1 OPEN 2 S2 OPEN 2 100K 2 1 OPEN
1 OPEN S3A 1
NOTE: Includes stray capacitances
500K S9 2 V2
For loop stability, use min value capacitor to prevent oscillation
S5A S6 2
+ -1
-
OPEN 1
OPEN 1
+ BUFFER
-
S3B 2K VAC 0.1 50 1 V10K
100
100
EOUT x2
5K
2 1
S4 ALL RESISTORS = 1% () ALL CAPACITORS = 10% (F)
50K
Test Circuits and Waveforms
+1.67V INPUT -1.67V +5V 90% OUTPUT -5V 10% t V SLEW RATE = V/t ERROR BAND 10mV FROM FINAL VALUE +200mV 90% OUTPUT 10% 0V RISE TIME 67mV INPUT 0mV OVERSHOOT -67mV 0
SETTLING TIME
NOTE: FIGURE 1. SLEW RATE AND SETTLING TIME
Measured on both positive and negative transitions from 0V to +200mV and 0V to -200mV at the output. FIGURE 2. TRANSIENT RESPONSE
VIN
+
-
VOUT 1.33k
50 667
50pF
FIGURE 3. SIMPLIFIED TEST CIRCUIT (APPLIES TO TABLE 2)
Spec Number 6
511025-883
Burn-In Circuits
HA7-2529/883 CERDIP
1 R1 2 3 VD2 C2 4
8
+
7 6 5 C3 C1 D1
V+
HA2-2529/883 METAL CAN
V+
C3
C1
D1
8 1 + 3 4 R1 VC2 D2 5 7
2
6
NOTES: R1 = 1M, 5%, 1/4W (Min) C1 = C2 = 0.01F/Socket (Min) or 0.1F/Row (Min) C3 = 0.01F/Socket (10%) D1 = D2 = 1N4002 or Equivalent/Board |(V+) - (V-)| = 30V
7
HA-2529/883 Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
c1 -A-DBASE METAL E b1 M -Bbbb S BASE PLANE SEATING PLANE S1 b2 b ccc M C A-B S AA C A-B S D Q -CA L DS M (b) SECTION A-A (c) LEAD FINISH
F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A)
8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE INCHES SYMBOL A b b1 b2 b3 c MIN 0.014 0.014 0.045 0.023 0.008 0.008 0.220 MAX 0.200 0.026 0.023 0.065 0.045 0.018 0.015 0.405 0.310 MILLIMETERS MIN 0.36 0.36 1.14 0.58 0.20 0.20 5.59 MAX 5.08 0.66 0.58 1.65 1.14 0.46 0.38 10.29 7.87 NOTES 2 3 4 2 3 5 5 6 7 2, 3 8 Rev. 0 4/94
eA
c1 D E e eA eA/2 L Q S1
e
DS
eA/2
c
0.100 BSC 0.300 BSC 0.150 BSC 0.125 0.015 0.005 90o 8 0.200 0.060 105o 0.015 0.030 0.010 0.0015
2.54 BSC 7.62 BSC 3.81 BSC 3.18 0.38 0.13 90o 8 5.08 1.52 105o 0.38 0.76 0.25 0.038
aaa M C A - B S D S
NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer's identification shall not be used as a pin one identification mark. 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH.
aaa bbb ccc M N
Spec Number 8
511025-883
HA-2529/883 Metal Can Packages (Can)
REFERENCE PLANE A L L2 L1 A A OD OD1 Oe 2 1 Ob1 Ob BASE AND SEATING PLANE BASE METAL LEAD FINISH N k1 OD2
T8.C MIL-STD-1835 MACY1-X8 (A1)
e1 8 LEAD METAL CAN PACKAGE INCHES SYMBOL A Ob Ob1 Ob2 OD MIN 0.165 0.016 0.016 0.016 0.335 0.305 0.110 MAX 0.185 0.019 0.021 0.024 0.375 0.335 0.160 MILLIMETERS MIN 4.19 0.41 0.41 0.41 8.51 7.75 2.79 MAX 4.70 0.48 0.53 0.61 9.40 8.51 4.06 NOTES 1 1 2 1 1 1 3 3 4 Rev. 0 5/18/94
k
OD1
C L
OD2 e
F Q
0.200 BSC 0.100 BSC 0.027 0.027 0.500 0.250 0.010 45o BSC 45o BSC 8 0.040 0.034 0.045 0.750 0.050 0.045 -
5.08 BSC 2.54 BSC 1.02 0.86 1.14 19.05 1.27 1.14
e1 F k k1
0.69 0.69 12.70 6.35 0.25
Ob1
Ob2
L L1
SECTION A-A
L2 Q
NOTES: 1. (All leads) Ob applies between L1 and L2. Ob1 applies between L2 and 0.500 from the reference plane. Diameter is uncontrolled in L1 and beyond 0.500 from the reference plane. 2. Measured from maximum diameter of the product. 3. is the basic spacing from the centerline of the tab to terminal 1 and is the basic spacing of each lead or lead position (N -1 places) from , looking at the bottom of the package. 4. N is the maximum number of terminal positions. 5. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 6. Controlling dimension: INCH.
N
45o BSC 45o BSC 8
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
Spec Number 9
511025-883

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